Jan holds the Donald O. Pederson Distinguished Professorship at the University of California at Berkeley. Before joining the faculty at UC Berkeley, he was a research manager at IMEC from 1985 until 1987. He is a founding director of the Berkeley Wireless Research Center (BWRC) and the Berkeley Ubiquitous SwarmLab, and has served as the Electrical Engineering Division Chair at Berkeley twice.
He is the recipient of major awards, amongst which the IEEE Mac Van Valkenburg Award, the European Design Automation Association (EDAA) Lifetime Achievement award, the Semiconductor Industry Association (SIA) University Researcher Award, and the SRC Aristotle Award. He is an IEEE Fellow, a member of the Royal Flemish Academy of Sciences and Arts of Belgium, and has received honorary doctorates from Lund (Sweden), Antwerp (Belgium) and Tampere (Finland).
He has been involved in a broad variety of start-up ventures, including Cortera Neurotechnologies, of which he is a co-founder.
Some of most compelling application domains of the IoT and Swarm concepts relate to how humans interact with the world around it and the cyberworld beyond. While the proliferation of communication and data processing devices has profoundly altered our interaction patterns, little has been changed in the way we process inputs (sensory) and outputs (actuation). The combination of IoT (Swarms) and wearable devices offers the potential for changing all of this, opening the door for true human augmentation. Yet, making sense of the plethora of information received from the often noisy sensors and making reliable decisions within very tight latency bounds (< 10 ms) typically demands huge computational workloads to be performed in wearable form factors at extreme energy efficiency. In this presentation, we will make the case why alternative non-Von Neumann computational paradigms and architectures may be the right choice for these cognitive processing tasks. Even more, we will focus on a computational model called Hyper-Dimensional Computing (HDC), and illustrate with concrete examples of why this approach may be the right one in a post-Moore data-driven arena.
Mickey Aleksic obtained his MS. and PhD. degrees in Electrical Engineering from the University of Belgrade in 1987 and 1992 respectively. He has over twenty-five years of experience in the development of high-performance 3D graphics architecture, low power 3D graphics, and image/video processing. In 2001 he co-founded Handheld business unit as part of ATI to expend ATI presence in PDA and mobile phones with low power (50mW) Imageon SOC. The business was first acquired by AMD in 2006 and later by Qualcomm in 2009. In his current role as Vice President of Engineering at Qualcomm, he oversees machine learning architecture, parallel heterogeneous computing, and multimedia processing. He holds over 80 patent in 3D graphics, multimedia processing, low power and system design.
This talk will cover machine learning challenges and opportunities in mobile devices. Deep learning comes with significant computational complexity, which reduces broad adoption in mobile and battery power devices. Recent advances in low-power algorithmic techniques and in specialized architectures for deep learning reduce the energy cost for deep learning technique, thereby extending the range of applications where such techniques are feasible. We will review algorithmic innovations that enable energy efficient hardware accelerators that offer 100x lower power consumption without any noticeable degradation of performance. The presentation will also preview some of the relevant advances in deep learning architecture for mobile/embedded devices.
Dr. Amir Khosrowshahi is vice president and CTO of the AI Products Group (AIPG). Previously, Khosrowshahi oversaw engineering for the Artificial Intelligence Solutions Group within the Data Center Group.
Khosrowshahi joined Intel in 2016 with the acquisition of Nervana Systems, where he was CTO and a company co-founder. He oversaw engineering efforts at Nervana, a recognized leader in developing computer architectures for machine intelligence and deep learning solutions. Amir has a research background in neuroscience and machine learning.
Khosrowshahi holds a bachelor’s degree in physics and math and a master’s degree in physics, both from Harvard University. He earned his Ph.D. in computational neuroscience from UC Berkeley.
The field of machine learning (ML) and AI is experiencing a remarkable period of growth and innovation. These advances are being rapidly adopted across a wide range of industries fueling a transformation in business. Amir will present some material applications of AI today and the technology that Intel is developing to enable them.
Allen Rush is an AMD Fellow specializing in imaging and deep learning technologies. Responsible for architecture definition, planning and advanced technologies for hardware and software in imaging and deep learning products. Prior to that, he held many technology leadership positions in imaging related companies, including several startups.
Deep Learning is emerging as one of the most important technologies that spans many application areas. The computational challenges for training and inference are substantial for applications ranging from small edge inference to large server class training. Hardware and software approaches to these challenges depend on model selection, power constraints, scalability, etc. In addition, the improvement and extension of deep learning models and frameworks continues to influence the design of scalable solutions.